PA1.1 & PA2.0 (230 Views)
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Occasional Visitor
전태규
Posts: 1
Registered: ‎02-17-2002
Message 1 of 5 (230 Views)

PA1.1 & PA2.0

[ Edited ]


HI,
Is there anybody know about the difference between PA1.1 and PA2.0.

What stands for PA?
What stands for 1.1 or 2.0?
How can i know in our system?

 

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Honored Contributor
Arunvijai_4
Posts: 4,194
Registered: ‎04-07-2005
Message 2 of 5 (230 Views)

Re: PA1.1 & PA2.0

Hi,

PA -- Precision Architecture

1.1 and 2.0 -- 32 bit and 64 bit support

# getconf HW_CPU_SUPP_BITS
# getconf HW_32_64_CAPABLE

-Arun
"A ship in the harbor is safe, but that is not what ships are built for"
Honored Contributor
Honored Contributor
DCE
Posts: 1,593
Registered: ‎05-16-2005
Message 3 of 5 (230 Views)

Re: PA1.1 & PA2.0



Here is a site that details PA-RISC processors
http://www.parisc-linux.org/documentation/index.html

If you have a PA 8X00 processor or higher you have a PA RISC 2.0 processor

I believe if the processor is PA 7X00 then it is 1.1.

You can use stm as one way to find the process model
Honored Contributor
Mridul Shrivastava
Posts: 980
Registered: ‎01-30-2006
Message 4 of 5 (230 Views)

Re: PA1.1 & PA2.0

You can execute this command to know the version on ur system:

#file /stand/vmunix
Time has a wonderful way of weeding out the trivial
Respected Contributor
Sung Oh
Posts: 174
Registered: ‎03-31-2006
Message 5 of 5 (230 Views)

Re: PA1.1 & PA2.0

Hello,

PA1.1->32-bit
'89 PA7000 (PCx-S), PA7100 (PCx-T),
PA7150 (PCx-T+), PA7100LC (PCx-L),
PA7200 (PCx-T'), PA7300LC (PCx-L2)

PA2.0->64-bit
'94 PA8000 (PCx-U), PA8200 (PCx-U+),
PA8500 (PCx-W),PA8600 (PCx-W+),
PA8700 (PCx-W2), PA8800, PA8900

PA1.1-> Included additional floating-point capabilities,
such as more floating-point registers, doubling the amount of register
space for single-precision floating-point numbers, and introducing
combined operation floating-point instructions[3]. These floating-point
features enabled higher performance in technical computations, including
graphics, where single-precision floating-point numbers are extensively
used.

In the system area, PA-RISC 1.1 architectural extensions were made to
speed up the processing of performance-sensitive abnormal events, such as
misses in the address translation cache (also called the TLB). Such
architectural changes are only visible to the operating system, and do
not affect any applications programs. Minor system changes have been
added to the three editions of the PA-RISC 1.1 architecture, known as
editions 1, 2 and 3, respectively, of the architecture manual.

PA-RISC 1.1 also added bi-endian support. Previously, PA-RISC 1.0 was a
consistently big endian machine, but in PA-RISC 1.1, support for little
endian was also provided by means of a mode bit.

----------------------------------

PA2.0->architecture represents the first time that user-visible
changes have been made to the core integer architecture. In addition to
support for 64-bit integer data and 64-bit flat addresses, other
user-visible changes have also been added to enhance the performance of
new user workloads. For example, Multimedia Acceleration eXtensions (MAX)
have been added to speedup multimedia processing by software running on
the main processor, rather than on separate optional hardware. Some
additional floating-point and system-level changes have also been added.

More info regarding PA.
http://cpus.hp.com/technical_references/parisc.shtml
http://www.hp.com/products1/itanium/infolibrary/information/pa-risc_illuminata.pdf

Regards,
Sung
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