HPMC chasis decoder (164 Views)
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Advisor
Raja Balasubramanian
Posts: 49
Registered: ‎06-19-2003
Message 1 of 7 (164 Views)

HPMC chasis decoder

Hi All,

A C-class machine crashed and the HPMC chasis coe reads like

CPU-ID( Model ) = 0xe
----------------- Processor 0 HPMC Information ------------------

Timestamp = Fri Dec 17 21:57:57 GMT 2004 (20:04:12:17:21:57:57)

HPMC Chassis Codes = 0xcbf0 0x500b 0x5408 0x5508 0xcbfb

HPMC checks are generally for hardware failures I believe.

Is there any software that is available to decode these HPMC chasis codes / PIM codes.
If there are any such softwares or utilities please let me know.

Are any utilities inbuilt in HPUX 11.11 that may used to understand these codes?

Also, I am interested to know more on Q4 and crashinfo utility .How to get them installed and their usage in analysing crash dumps.

Thanks for any information that can be provided.

Regards,
Raja.B
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Honored Contributor
Andrew Rutter
Posts: 2,108
Registered: ‎07-03-2002
Message 2 of 7 (164 Views)

Re: HPMC chasis decoder

hi raja,

yes HPMC is hardware related
High Priority Machine Check

you need the full output from the pim to fully try and work out the problem though.
This can be from the PIm at pdc, through STM(online diagnostics) or the tombstone files in
# /var/tombstones the last one been /ts99

These should really be sent to Hp for diagnosis.
I know some people in the forums have experience in them so if you showed the full output we may be able to help you further.

Hp keeps the Q4 program close to itself though and would need a Hp engineer to get you the results i believe.

You can also get some error information from the GSP aswell, even if the system is down.

press control b and login then sl,e,n and browse the logs. There also could be other info in the hpux logs if the system will come back up again.

hope thats abit of use to you

Andy
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Trusted Contributor
Iain Ashley
Posts: 48
Registered: ‎10-22-2002
Message 3 of 7 (164 Views)

Re: HPMC chasis decoder

Hi Raja,
I have had a look at the chassis codes, and there has been a runway bus timeout (if the system is a K-Class) and some broad errors beyond that. Unfortunately beyond that I need the full PIMM which is obtainable as mentioned above. Post that with the host model and we can help. It looks like something I/O related at this point though it is hard to tell.

Regards
Iain Ashley
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Advisor
Raja Balasubramanian
Posts: 49
Registered: ‎06-19-2003
Message 4 of 7 (164 Views)

Re: HPMC chasis decoder

Hi Andy / Iian,

I am attaching the tombstones output.

The model is 9000/780/C180

Also please let me know if decoders are available,


Thanks,
Raja.B
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Honored Contributor
Andrew Rutter
Posts: 2,108
Registered: ‎07-03-2002
Message 5 of 7 (164 Views)

Re: HPMC chasis decoder

Hi raja,

this is the output from the PIM decoder for workstations

Summary:
Below is a list of causes for the failure ordered from most likely to least likely. Replace assemblies in the order listed.
CPU board

Details:
CBF0 HPMC_INITIATED HPMC handling initiated
500B CPU 0 Runway bus timeout, Transaction failed to complete
5408 U2 chip IOA 0 Runway broad error. This IOA received a Broad_Error from another module. Look elsewhere for the cause of the Broad_Error.
5508 U2 chip IOA 1 Runway broad error. This IOA received a Broad_Error from another module. Look elsewhere for the cause of the Broad_Error.
CBFB Branching to OS HPMC handler. Was in OS when failure occured.

Check Summary = 0x80080000200046C0
Bit 0: HPMC is detected
Bit 12: Instruction I/O fetch timeout. Validates the READ_SHORT logging register.
Runway Error Type (Check Summary[32:35]) = 0x2
Runway Timeout
Bit 49: Parity LPMCs enabled.
Bit 53: Sticky bit. Set when a parity error is found in the even (bit 0) data word of the even cache port. Only cleared with a move-to-diagnose instruction.
Bit 54: Sticky bit. Set when a parity error is found in the odd (bit 1) data word of the even cache port. Only cleared with a move-to-diagnose instruction.
Bit 56: Sticky bit. Set when a parity error is found in the even (bit 0) data word of the odd cache port. Only cleared with a move-to-diagnose instruction.
Bit 57: Sticky bit. Set when a parity error is found in the odd (bit 1) data word of the odd cache port. Only cleared with a move-to-diagnose instruction.

This can also be downloaded from
www.software.hp.com

Its just the server one I cannot get hold of

Andy
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Trusted Contributor
Iain Ashley
Posts: 48
Registered: ‎10-22-2002
Message 6 of 7 (164 Views)

Re: HPMC chasis decoder

Hi Raja,
OK,
chassis code 0x500b indicates a runwaybus timeout detected by CPU 0. 0b also indicates that a watchdog timer condition is detected on the HSC bus - so somewhere in the IO

CPU status reg-0 bits 0-3 indicate ESTAT 2 which is a runway bus timeout, confirming this.

CPU Status reg-1 bit 12 is set indicating an instruction I/O fetch timeout.

OK lets look at the IO

bus 0 paths 8 and 10 both indicate estat 0x0d - Runway Broad error - ie look elsewhere. Nowhere else to look. this means that the IOA or HSC module with the error has not reported to PDC. So, it is an IO module that is not listed above (so not 0/8 or 0/10).

Lets look at the read short LOG -
first check that it is valid, bit 28 on CPU stat reg-1 should be set, which it is not, so this is no use ...

Have to guess from here - could be CPU card, IO riser or, and IO card that does not appear above,

sorry I can't be more specific.

Unfortunately there is no automated PIM decoder for the C180 - it has to be done by hand.

Regards
Iain Ashley

Regards
Iain Ashley

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Honored Contributor
Andrew Rutter
Posts: 2,108
Registered: ‎07-03-2002
Message 7 of 7 (164 Views)

Re: HPMC chasis decoder

hi raja,

From my post you will see that it indicates the CPU board that has failed.

The part number for replacement is
A4200-69518 or A4200-66518. You can get these fairly cheaply from second user resellers .

Iain if you read this.
This info came from a PIM decoder for the workstations freely downloadable from softwware.hp.com
It covers most of the workstations from C160 up

Andy
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